Ph.D. Theses

Ph.D. Theses Supervised

  • Y. Chen, “Design of FIR Digital Filters with Finite Coefficient Word Lengths” Rutgers University (1979)
  • K. Cioffi, “Circuit Simulation Models for the High Electron Mobility Transistor” University of Illinois (1987)
  • F. P. Lai, “Rule-Based Circuit Optimization for CMOS VLSI” University of Illinois (1987)
  • H. Y. Chen, “Design Automation of High-Performance CMOS VLSI Circuits” University of Illinois (1988)
  • A. T. Yang, “iSMILE: An Integrated System for Device Model Design, Parameter Extraction, and Circuit Simulation” University of Illinois (1989)
  • T. K. Yu, “Statistical Design of MOS VLSI Circuits with Designed Experiments” University of Illinois (1989)
  • D. S. Gao, “Circuit Simulation Models and Optical Switch Structure for Interconnection Networks” University of Illinois (1990)
  • Y. Leblebici, “Modeling and Simulation of Hot-Carrier Induced Device and Circuit Degradation for VLSI Reliability” University of Illinois (1990)
  • Y. H. Shih, “Computationally Efficient Methods for Accurate Timing and Reliability Simulation of Ultra-Large MOS Circuits” University of Illinois (1991)
  • S. Sapatnekar, “A Convex Programming Approach to Problems in VLSI Design” University of Illinois (1992)
  • C. H. Diaz, “Modeling and Simulation of Electrical Overstress Failures in Input/Output Protection Devices of Integrated Circuits” University of Illinois (1993)
  • M. Sriram, “Physical Design for Multichip Modules” University of Illinois (1993)
  • E. Brauer, “Functional Verification and Timing Analysis of Large Digital Emitter-Coupled Logic Circuits Including Voltage Regulators” University of Illinois (1993)
  • J. J. Morikuni, “Design, Analysis and Simulation of Optoelectronic Integrated Circuits (OEICs) and Subsystems” University of Illinois (1994)
  • M. H. Cynn, “Incremental Algorithms for General Purpose Layout System” University of Illinois (1994)
  • A. Dharchoudhury, “Advanced Techniques for Fast Timing and Mixed-Mode Simulation of MOS VLSI Circuits” University of Illinois (1995)
  • D. H. Cho, “iSIM: Ultra-Deep Submicron MOSFET Physical Model for Analog and Low Power Digital Circuits” University of Illinois (1995)
  • E. P. Olson, “Optimal State Assignment for Low Power VLSI Design” University of Illinois (1995)
  • E. Chang, “Full and Approximate Modeling of Transmission Lines for High-Speed Interconnect Simulation” University of Illinois (1995)
  • W. Sun, “Modeling and Simulation of Hot-Carrier Induced pMOSFET Degradation” University of Illinois (1995)
  • T. Karnik, “Hierarchical Partitioning of VLSI Systems” University of Illinois (1995)
  • J. W. Kim, “Automatic Layout Synthesis for High-Performance Full Custom VLSI Chips” University of Illinois (1995)
  • J. W. Lockwood, “Design and Implementation of a Multicast, Input-Buffered ATM Switch for the iPOINT Testbed” University of Illinois (1995)
  • A. M. Hill, “Switching Density Analysis for Power and Reliability in VLSI Circuits” University of Illinois (1995)
  • C.-C. Teng, “Hierarchical Electromigration Reliability Diagnosis for ULSI Interconnects” University of Illinois (1996)
  • S. Ramaswamy, “Modeling Simulation and Design Guidelines for EOS/ESD Protection Circuits in CMOS Technologies” University of Illinois (1996)
  • B. K. Whitlock, “Computer-Aided Design of Optoelectronic Links and Busses” University of Illinois (1996)
  • H. Duan, “Design and Development of Cell Queuing, Processing, and Scheduling Modules for the iPOINT Input-Buffered ATM Testbed” University of Illinois (1997)
  • A. Hossain, “Multicast Video Transport Over iPOINT ATM Testbed” University of Illinois (1997)
  • Y. K. Cheng, “Electrothermal Simulation and Temperature-Sensitive Reliability Diagnosis for CMOS VLSI Circuits” University of Illinois (1997)
  • J. W. Stroming, “VLSI architectures for MPEG-4 video object decoding” University of Illinois (1998)
  • U. Ekambaram, “Behavioral Simulation and Analysis of Periodic Analog Systems” University of Illinois (1998)
  • P. Mena, “Modeling of Surface Emitting Laser Diodes” University of Illinois (1998)
  • T. Li, “Design Automation for Reliable CMOS Chip I/O Circuits” University of Illinois (1998)
  • L. P. Yuan, “Power and Voltage Drop Analysis in VLSI Circuits” University of Illinois (1999)
  • H. Kutuk, “A Fast Timing Simulator with Accurate Reduced-Order Interconnect Models” University of Illinois (1999)
  • H. Tsai, “Temperature-Aware VLSI Design and Analysis” University of Illinois (2000)
  • K. W. Kim, “Reliable Low-Power Solution for High-Performance VLSI Circuit Design” University of Illinois (2000)
  • Q. Li, “Layout Extractor Including Substrate Parasitics for ESD Protection Circuits and Design Rule Checking” University of Illinois (2000)
  • J. Chen, “Modeling and Simulation of Integrated Microstructures and Systems” University of Illinois (2000)
  • S. Ho, “Design and Evaluation of iLEADER for High Performance Optical Networks” University of Illinois (2000)
  • S.-Y. Park, “Dynamic Rate Controlled Input-Output Buffered Switch System with QoS” University of Illinois (2000)
  • Jay Moorman, “Quality of Service Support for Heterogeneous Traffic Across Hybrid Wired and Wireless Networks” University of Illinois (2001)
  • Chul-Woo Kim, “Low-Power CMOS Circuits for High-Performance Deep Submicron System On a Chip” University of Illinois (2001)
  • Woong-Chul Choi, “Quality of Service Provisioning in Integrated Service Networks” University of Illinois (2001)
  • Seung-Moon Yoo, “Design of Energy Efficient SOC with PIM Architecture and Deep Sub-micron Circuit Techniques” University of Illinois (2001)
  • Jaesik Lee, “Design for ESD Reliability in CMOS Mixed-Signal Integrated Circuits” University of Illinois (2001)
  • Kwang-Hyun Baek, “1-GS/s, 12-Bit High-Performance SiGe BICMOS Digital-to-analog Converter” University of Illinois (2002)
  • Soeng-Ook Jung, “Low-Power High-Performance Dynamic Circuit Design for Ultra-Deep Submicron Technology” University of Illinois (2002)
  • Ge Yang, “Low Power and High Performance Circuit Design for Process Scalability” University of California at Santa Cruz (2004)
  • Shu Wu, “Circuit-Level Modeling and Simulation Optoelectronic Devices and Systems Using VHDL-AMS” University of California at Santa Cruz (2004)
  • Wei Li, “Thermal-Driven Placement in 3-Dimensional Integrated Circuits” University of California at Santa Cruz (2007)
  • Yong Sin (Shon) Kim, “A Multi-Level Simultaneous Bidirectional I/O for High Speed Application” University of California at Santa Cruz (2008)
  • Hu Jun, “Semiconductor Nanowire Based Optoelectronic Devices: Physics, Simulation and Design” University of California at Santa Cruz (2008)
  • Je-Hyoung Park, “Fast Chip-Level Static and Transient Thermal Analysis Method for Thermal Management of VLSI ICs in Packages” University of California at Santa Cruz (2009)
  • Moo Sung Chae, “High-Density Wireless Neural Recording IC” University of California at Santa Cruz (2013)
  • Le Zheng, “Memristor-based Ternary Content Addressable Memory for Data-Intensive Applications” University of California at Santa Cruz (2015)
  • Peng Zhou, “Memristive Spiking Neural Network for Neuromorphic Computing” University of California at Santa Cruz (2022)