M.S. Theses Supervised
- D. Chu, “Prevention of Single Event Upset in CMOS VLSI” University of Illinois (1987)
- J. P. Ebner, “Accurate Parametric Test of High-Speed Digital Integrated Circuits” University of Illinois (1987)
- J. L. Krysl, “Investigation of the Metastable Properties of Memory Devices in CMOS Technology” University of Illinois (1987)
- C. G. Brooms, “A CMOS Voltage Regulator” University of Illinois (1987)
- S. M. Coward, “The Impact of Two Level Metallization on PLA Performance and the GENESIS PLA Generator” University of Illinois (1987)
- S. Mitra, “Simulation-Based Comparison of Hopfield and Projection Neural Network Models” University of Illinois (1988)
- M. S. Lohman, “Design of a GaAs Modulation Doped FET Photoreceiver with iSMILE Simulation” University of Illinois (1990)
- M. Sriram, “Two-Dimensional Module Placement Using a Hopfield Neural Network” University of Illinois (1990)
- J. J. Morikuni, “Modeling of Optical Logic Gates for Computer Simulation” University of Illinois (1990)
- J.-P. Bianchi, “A New Model of MSM Photodetector and Its Application to MSM-HEMT Photoreceiver Design” University of Illinois (1991)
- N. Lek, “A Global Routing Scheme for Sea-of-Gates Arrays Using Zero-One Optimization Methods” University of Illinois (1990)
- A. B. Jani, “A Real-Time Digital FIR Filter for A Range of Sample Rate Reductions” University of Illinois (1990)
- J. C. Pang, “Fast Prototyping of Device Models using Table-Lookup Methods in Computer Simulation” University of Illinois (1991)
- R. E. Wiegand, “Recognizing Handwritten Digits with a Multilayer Perception” University of Illinois (1991)
- A. Dharchoudhury, “Worst-Case Design Optimization of MOS VLSI Circuits” University of Illinois (1992)
- W. Sun, “Parametric Macromodeling for Design-for-Reliability of Hot-Carrier Resistant MOS VLSI Circuits” University of Illinois (1992)
- R. Thaik, “A Compact Timing-Driven CMOS Integrated Circuit Layout Generator” University of Illinois (1992)
- B. K. Whitlock, “Computer Modeling and Simulation of Digital Lightwave Links using iFROST, illinois FibeR-optic and Optoelectronic Systems Toolkit” University of Illinois (1993)
- J. W. Lockwood, “The iPOINT Testbed for Optoelectronic ATM Networking” University of Illinois (1993)
- A. M. Hill, “Application of Genetic Algorithms to Performance-Driven Standard Cell Gate Sizing” University of Illinois (1993)
- J. Bieker, “Worst-Case Analysis of CMOS Integrated Circuits using iEDISON2.0” University of Illinois (1994)
- P. Mena, “Design of a CMOS IC with Hybridly Integrated Optical Interconnects” University of Illinois (1995)
- A. Xiang, “Modeling and Simulation of Optoelectronic Integrated Circuits” University of Illinois (1995)
- J. W. Stroming, “VHDL Synthesis of the Two-Dimensional Discrete Cosine Transformation” University of Illinois (1995)
- H. Kutuk, “Field Programmable Analog Array (FPAA) Design using Switched-Capacitor Techniques” University of Illinois (1995)
- C. H. Tsai, “Web-Based VLSI Reliability Simulation Tools” University of Illinois (1997)
- S. Y. Park, “An Event-Driven Behavioral ATM Switch Simulator” University of Illinois (1997)
- J. Yang, “Distributed Web-Based Applications for ATM Switch Control and Optical Link Simulation” University of Illinois (1997)
- M. Bossardt, “Available Bit Rate Architecture and Simulation for an Input-Buffered and Per-VC Queued ATM Switch” Swiss Federal Institute of Technology at Lausanne (ABB Award)/University of Illinois (1998)
- S. Dixon, “Design and Development of the IIQUEUE/WUGS Interface, and Quality of Service and Queuing Algorithms for the iPoint Input-Buffered ATM Testbed” University of Illinois (1998)
- J. Mooreman, “Supporting Quality of Service on a Wireless Channel for ATM Wireless Networks” University of Illinois (1998)
- D. Chen, “Interconnect Thermal Modeling for Accurate Simulation of Circuit Timing and Reliability” University of Illinois (1999)
- V. Nishar, “Intellectual Property VLSI Chips – A Business Perspective” University of Illinois (1999)
- J. Katzenstein, “Substrate Noise Analysis” University of Illinois (2000)
- S. Bucheli, “Compensation Modeling for QoS Support on a Wireless Network” Ecole Polytechnique de Lausanne/University of Illinois (2000)
- Eddy Ahn, “An Implementation of Cache-Level Data Compression” University of Illinois (2000)
- Ge Yang, “High Performance Dynamic Circuits” University of California, Santa Cruz (2003)
- Qi Wang, “Leakage Suppression Techniques for CMOS SRAM” University of California, Santa Cruz (2003)
- Alexander Barangan, “High-Speed,Low-Power Adder Design Using Parallel-Dynamic Logic” University of California, Santa Cruz (2003)
- Zhongda Wang, “Differential Amplifier Design in Substrate Noisy Mixed-Signal Environment” University of California, Santa Cruz (2004)
- Peter Holm, “Implementing Self-Reverse Biasing Circuits For Leakage Reduction” University of California, Santa Cruz (2005)
- Y. Shao, “Application of Memristive Device Arrays for Pattern Recognition” University of California, Santa Cruz (2020)
- X. Jia, “Design and Training of Memristor-based Neural Network” University of California, Santa Cruz (2020)